CIME Nanotech - Assistant engineer

06/2025 - 09/2025, Grenoble

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Context: Multi-sensory platform using digital twins and haptics for teaching nanoscience (cross-university structure).

Tasks:

• Improving the compilation and software distribution process (migration to CMake)
• Designing and implementing a client/server architecture with local TCP communication
• Porting a graphical interface and a simulation model from a real-time Linux OS to Windows and integrating it with the platform (moving the simulation to the server).

Comment: I learned how much cyber-physical systems require control of "real-time" aspects, to ensure both stability of the physics models and coherence of user interactions.

Themes:

• digital twins
• HUI
• real-time

C++ Qt 6 CMake Unity C# CHAI3D Python 3

VERIMAG - Research intern

07/2022 - 09/2022, Saint-Martin-d'Hères

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Context: Research laboratory internship for the “stage d’excellence” program at Université Grenoble Alpes

Tasks:

• Connecting VERIMAG tools with reinforcement learning environments (OpenAI Gym)
• Evaluating robustness of trained models (signal temporal logic)
• Experimenting training improvement using this robustness (reward shaping)

Comment: I learned a lot about how research works, in part thanks to the presentations given by the researchers, and the discussions held afterwards.

Themes:

• machine learning
• formal methods

Python 3 C++ OpenAI Gym PyTorch Hugging Face Jupyter Notebook CMake

Grenoble INP - Ensimag

10/2023 - 2026

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Ensimag is an engineering school in applied mathematics and computer science (Master’s degree). I’ve carried out group projects I found particularly interesting:

• JPEG Encoder (C): Written from scratch using only the specification, including support for progressive levels of detail – 2 weeks – team of 3
• Deca Compiler (Java): Implementation of a compiler for a Java-like language and its testing infrastructure – 4 weeks – team of 5
• OS Conception (C): Writting an operating system for x86 (32 bits) with its components (process management, virtual memory, IO, etc)
• RISC-V Processor (VHDL): Implementation and testing of instructions, with deployment on FPGA

PeiP Polytech Grenoble

09/2021 - 06/2023

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Two years integrated prep school including teachings of license at Université Grenoble Alpes (computer science and mathematics) with additional engineering modules